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Behavioral & Test Circuits
Input reflected ripple
measurement point
F1
1A
Fuse
+In
+Out
+
Notes:
Enable/Disable Switch
Source inductance should be no more than 200 nH. If source inductance is
K
C1
2.2 μF
electrolytic
SW1
D1
R2
2 k Ω
TM
R SV
PC
-In
-Out
BCM
+Out
Ro -Out
R3
10 m ?
C3
10 μF
Load
–
greater than 200 nH, additional bypass capacitance may be required.
C3 should be placed close to the load.
R3 may be ESR of C3 or a separate damping resistor.
D1 power good indicator will dim when a module fault is detected.
Figure 20 — BCM test circuit
V?I Chip Bus Converter Level 1 DC Behavioral Model for 384 V to 12 V, 300 W
I OUT
R OUT
+
15.0 m ?
+
1/32 ? Iout
V ? I
1/32 ? Vin
V IN
I Q
15 mA
+
–
+
–
V OUT
K
–
–
?
Figure 21 — This model characterizes the DC operation of the V?I Chip bus converter, including the converter transfer function and its losses. The model enables
estimates or simulations of output voltage as a function of input voltage and output load, as well as total converter power dissipation or heat generation.
V?I Chip Bus Converter Level 2 Transient Behavioral Model for 384 V to 12 V, 300 W
0.107 nH
L IN = 5 nH
I OUT
R OUT
Lout = 1.1 nH
+
V IN
C IN
R C IN
20.8 m ?
0.2μF
I Q
15 mA
1/32 ? Iout
+
–
V ? I
K
+
–
0.505 m ?
1/32 ? Vin
15.0 m ?
C OUT
R C OUT
0.45 m ?
31 μF
+
V OUT
–
–
?
Figure 22 — This model characterizes the AC operation of the V?I Chip bus converter including response to output load or input voltage transients or steady state
modulations. The model enables estimates or simulations of input and output voltages under transient conditions, including response to a stepped load with or
without external filtering elements.
vicorpower.com
800-735-6200
V?I Chip Bus Converter
B384F120T30
Rev. 2.4
Page 10 of 12
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